The present invention relates in general to multi-processor computer system operation and more particularly to a method and apparatus for handling invalidation requests to processors not present in a computer system.
A large computer system is conventionally implemented with a large number of processors accessed through node controllers at node locations. The node controllers include memory directories employing coarse directory protocols. Coarse directory protocols provide a technique that represent each processor in the computer system by saving space in the memory directory. Space is saved by grouping node controllers and associated processors that share information in memory. When it becomes necessary to invalidate all nodes with a shared copy of a cache line, invalidate commands are sent to all of the nodes within a group that includes the node that contains the shared copy of the memory. Typically, each node processes the invalidation command and sends an acknowledgment message back to the node that originated the invalidation command. Since full operation of the computer system does not continue until all expected acknowledgment messages are received, each node in a group must be present and operational for the computer system to work effectively. However, there may be situations where certain nodes of a group may not be present or may be in a failure state. Typical computer systems merely allowed the problem of sending invalidation messages to non-existent to occur or simply wasted directory space to handle the problem. Therefore, it is desirable to provide a technique to process invalidation commands for nodes that may not be currently present or operational in a computer system.
From the foregoing, it may be appreciated that a need has arisen for a technique to handle invalidation requests to processors that have been removed from or unavailable to computer system. In accordance with the present invention, a method and apparatus for handling invalidation requests to processors not present in a computer system are provided that substantially eliminate or reduce disadvantages and problems associated with conventional computer system operation.
According to an embodiment of the present invention, there is provided a method of handling invalidation requests to processors not present in a computer system that includes receiving an invalidation request and identities of processors affected by the invalidation request. A determination is made as to which processors are currently present in the computer system and which processors are currently not present in the computer system. Invalidation messages are generated and transferred to processors determined to be present in the computer system. Acknowledgment messages are returned from processors that received and processed their respective invalidation message. Acknowledgment messages are generated and returned for those processors determined to not be present in the computer system.
The present invention provides various technical advantages over conventional computer system operation. For example, one technical advantage is to avoid sending invalidation messages to non-existent processors in a computer system. Another technical advantage is to maintain effective operation of the computer system despite invalidation requests directed to non-existent processors. Yet another technical advantage is to filter out invalidation requests to non-existent processors and generate acknowledgment messages associated therewith. Still another technical advantage is to provide for the use of various coarse directory protocols in the computer system. Other technical advantages may be readily apparent to those skilled in the art from the following figures, description, and claims.